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Strip compiler options from the CC variable

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The Makefile checks validity of the compiler command in the CC
variable by feeding the contents of that variable to the `type'
utility. Some environments include compiler options in the CC
variable such as architecture specific tuning flags. For such
cases it is necessary to first strip everything except the
command itself from the contents of the CC variable prior to
checking the command with the type utility, which is what this
patch is introducing. We use shell parameter expansion mechanism
for this purpose.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
This commit is contained in:
Dmitri Vorobiev 2017-12-28 11:42:45 +02:00
parent 3238cf4fe7
commit 12a9d1a32b
1 changed files with 2 additions and 2 deletions
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4
Makefile
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@ -36,8 +36,8 @@ endef
export REDIS_TEST_CONFIG
# Fallback to gcc when $CC is not in $PATH.
CC:=$(shell sh -c 'type $(CC) >/dev/null 2>/dev/null && echo $(CC) || echo gcc')
CXX:=$(shell sh -c 'type $(CXX) >/dev/null 2>/dev/null && echo $(CXX) || echo g++')
CC:=$(shell sh -c 'type $${CC%% *} >/dev/null 2>/dev/null && echo $(CC) || echo gcc')
CXX:=$(shell sh -c 'type $${CXX%% *} >/dev/null 2>/dev/null && echo $(CXX) || echo g++')
OPTIMIZATION?=-O3
WARNINGS=-Wall -W -Wstrict-prototypes -Wwrite-strings
DEBUG_FLAGS?= -g -ggdb